Regarding an electronic device including semiconductor elements, a technique for mounting a semiconductor element such as, for example, a central processing unit (CPU) or a memory, above a predetermined circuit board via a relay board (circuit board) such as, for example, an interposer is known.
In the electronic device employing such a technique, when power is supplied from a predetermined circuit board to the semiconductor element through the relay board, a sufficient current density may not be obtained due to the relay board so that desired power may not be supplied to the semiconductor element. In addition, when signal transmission is performed between the predetermined circuit board and the semiconductor element through the relay board, a delay or loss in the signal transmission may occur due to the interposed relay board. When such things occur, the performance of the semiconductor element may not be sufficiently exhibited.
The followings are reference documents.
[Document 1] Japanese Laid-Open Patent Publication No. 2001-284520 and
[Document 2] Japanese Laid-Open Patent Publication No. 2011-44654.